Interface seven-segment with FPGA board

In this tutorial, we will show you how you can interface seven-segment display with FPGA board and display a number on it. Before continuing, make sure you understand the basics of FPGA programming (Verilog), know how one uses Xilinx Project Navigator to simulate Verilog programs and How one can program a code on FPGA board. Things you need: FPGA board (we will be using Xilinx X-SP6-X9) / FPGA chip with J-TAG / Any Digilent board Xilinx ISE (Project Navigator, PlanAhead, iMPACT) Seven-segment display (many development boards contains on board seven-segment display) Xilinx platform cable (in case of Xilinx FPGA) /...

Verilog Gate level Modeling examples

Following examples will help you a clear out understanding of Gate Level Modelling of Verilog. Example-1: Simulate four input OR gate Verilog code: module orgate(out, a, b, c, d); input a, b, c, d; wire x, y; output out; or or1(x, a, b); or or2(y, c, d); or orfinal(out, x, y); endmodule In the above Verilog code, we have used wire concept. Wires are used to connect modules just like on the breadboard. An output of one module is an input to another module and this can be performed by using wire. Wire ‘x’ and wire ‘y’ is the input to...

Introduction to Verilog

This is an introductory article on how to program digital electronics in Verilog and simulate the result in Modelsim. Verilog is a hardware language it is different from conventional High level language like C/C++. You need to think in a hardware style like how hardware works ? how these digital gates work ? This tutorial will help you in understanding basics of Verilog and will present some examples on how you can simulate your digital circuit on Modelsim using Verilog. See Tutorial on Modelsim here Introduction: Verilog is Hardware descriptive language (HDL) and is standardized as IEEE 1364. The code...